Now, digital logic isn't all that helpful without the ability to store any data, so let's work with some basic memory circuits. There are a whole lot of variants, but we'll be starting with the D flip-flop. This circuit is implemented with a single chip (the SN74LS74N) which has four inputs and two outputs, as shown below:
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| Pinout for the SN74LS74N dual D flip-flop chip. Note that each side of pins has an independent flip-flop circuit. | Original courtesy of https://commons.wikimedia.org/wiki/User:Inductiveload |
In typical operation, the output $Q$ is the same as the last voltage seen at the data input $D$ when the clock signal was high. Typically the other output $\overline{Q}$ is the negation of $Q$ (i.e. if $Q$ is high, $\overline{Q}$ is low). The Set and Reset inputs are typically held high, but when they're pulled low (0V) they will set $Q$ and $\overline{Q}$ (respectively) to high regardless of the clock and data.
To start off, we'll want to rebuild our logic-level button similarly to the previous lab.
Connect the button's output to the clock $\gt$ input, and one LED to the $Q$ output of the flip-flop. Finally, connect the function generator to both the other LED indicator and the $D$ input, as shown in the block diagram below:
With the function generator set up to produce a slow (1Hz) 0-5V square wave, let's try a few things
You need to change your square wave to either have a 2.5V offset, or you can directly set the min/max levels. Failure to do this will make your circuit behave unpredictably.
Verify that the output $Q$ only changes when you press the button AND the clock signal is the opposite of $Q$, and that it otherwise saves its state.
Use a wire to pull the $S$et input to ground, and verify that $Q$ behaves as it should
Sometimes it is useful to have a circuit that can toggle between two states. For example, if you have multiple light switches in a room you probably want each one to toggle the lights no matter the state of the other. (For lights, some clever switches and wiring are used instead of digital logic)
Let's wire up our D flip-flop to toggle itself only when we give it an additional input signal, as shown below:
Now for deciding on toggle logic gate: we want our output to switch states on the next clock input only when $T$ is held high, as shown in the following truth table (the bar denotes an inversion from 1 to 0 or vice versa):
| T | $Q_{n+1}$ |
| 0 | $Q_n$ |
| 1 | $\overline{Q_n}$ |
Using one of your logic gates from last lab, build a toggleable flip-flop circuit. If you're not sure which one to use, try looking up the wikipedia page on logic gates.
Turn your function generator frequency down to something in the Hz range again for this
Build your T-flop circuit, and verify that it behaves as desired
Keep this circuit built!
While we could chain multiple flip-flops together to make a counter with one bit per flip-flop, that would get cumbersome quite quickly. Furthermore, a basic flip-flop counter can only count upwards, needing additional logic to change that. Fortunately for us, there are already purpose-made chips that do what we need! Here's the setup for a 4-bit counter, the 74LS191:
While this chip has quite a few features, we'll configure it to do two: count up and down in binary. Wire up the chip as shown above at right.
Using the function generator as a clock input on pin 14, (and grounding pin 5 to make the counter increase) watch each of the outputs A,B,C, and D and verify that the frequency they change at decreases by a factor of two for each one.
Instead of looking at each output on the scope, we can use LEDs as indicators here to show what's going on visually
Test the counter by using a series of LEDs as outputs
We can make our clock upwards to 9 (digitally) and then back downwards to 0 by utilizing the max/min output and our toggleable flip-flop we built before.
Observe the behavior of your counter once you start it going
Now, you may have found a problem here. After your counter reaches a maximum value, the max/min pin goes high, toggling the direction. But this happens at the same clock cycle that the next count occurs in, so the counter gets stuck flipping between 0 and 15. However, there is a possible solution: doubling the clock speed of the flip-flop
Set the second output of your function generator to produce a 0-5V square wave with double the frequency of the first output, and use this as a clock for your flip-flop
Welcome to the wonderful world of clock domains! While this might seem a bit silly, we can replace the self-toggle with something else (such as logic reading out the direction of a rotary encoder…). This is exactly the sort of thing you would do in the logic of an FPGA. There might be a prebuilt solution in the software, but the implementation will be the same sort of thing.
Portions of this lab are based on material from Learning the Art of Electronics by Hayes and Horowitz